Abstract

In this paper we propose a high-level description method of digital IC based on a new collection of circuit components, dataow driven operators (DFDOs), to short time-to-market with fewer costs. The complex period precision control design in synchronous digital IC, which requires most of design and verification effort, is replaced by the design of dataow that exists in original algorithm and circuit system architecture according to this method which is easily and effciently implementable. The synchronization problem is solved through the synchronization logic circuit, which implements handshake protocol instead of global synchronous clock, inside of each DFDO. DFDO is classified as four kinds, which are soundness to support all digital IC design as a new collection of circuit components like standard cells, and they are computation DFDO, datapath DFDO, controller DFDO and memory DFDO. A high-level abstract language APU C which combines ANSI C and verilog to do the dataow design is also proposed which is subject to higher design effciency with less code amount and verification effort. To fully quantify this method and the performance of circuits designed by this method, a 512-point radix-2 fixed-point FFT is presented. The result shows that our work has a comparable performance on area, speed and power.

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